Explicitly Staged Software Pipelining
نویسندگان
چکیده
This paper describes an alternative to modulo scheduling for loops, in which the first step is to divide instructions into stages by solving a series of min-cut problems constructed from the code graph of the unscheduled loop body. Our algorithm is formulated and implemented in terms of the code graphs of our own “declarative assembly language” for CELL SPUs. We have measured an average 20% reduction in Iteration Interval between our algorithm and modulo scheduling via XLC.
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